Newsletter

Tutorial: Line echo canceller (LEC) and DC offsets

This article introduces the objective methods for testing VoIP speech quality. It explains the technical principles of these methods, shows how they are applied, and compares their performance.

Page 1 of 2

Courtesy of DSP DesignLine

In VoIP systems, the line echo canceller (LEC) plays an important role in guaranteeing voice quality and low-speed modem connection stability. Echo cancellation is especially in systems with an IP backbone, where the migration from circuit to packet networks adds delay.

Although LEC is a powerful tool, there are a variety of factors that can degrade its performance. One factor that designers often overlook is the DC offset. DC offsets can be introduced by A/D converters or front end circuits. The LEC algorithm is sensitive to signal power, so these DC offsets will ultimately degrade performance. Even a small DC offset from can cause residual echo leakage, voice fluctuation, and increased bit error rates in data transfers. To eliminate these problems, designers must remove DC offsets from the system.

Line Echo Canceller Model
A typical line echo canceller is shown in Figure 1. It uses a two echo path model with foreground (FG) filter H(n) and background (BG) adaptive filter H'(n). The non-linear processor (NLP) is used to further reduce or completely remove any residual echo after FG filter processing. Whenever the NLP engages, the comfort noise generator (CNG) attempts to mask the residual echo.


(Click to enlarge)

Figure 1. Two echo path modeling LEC.

The BG adaptive filter uses Normalized Least Mean Squares (NLMS) algorithm to find the coefficients that produce the least mean squares of the error signal, i.e., the difference of send in signal (Sin) and receive in signal (Rin). The NLMS algorithm is a variant of the LMS algorithm. The NLMS algorithm normalizes with the power of the input Rin signal to solve the problem of LMS algorithm's convergence instability.

The FG filter is used to remove the echo. The transfer and control logic unit copies the FG filter coefficients to the BG filter coefficients under the following conditions (for all of the following, 0<α<1, 0<β<1 and Pj(s) denotes a short time power of signal s(k) for the jth time interval):

  1. Pj(e(b)) < α Pj(e(f)). In this scenario, the BG filter provides a larger echo return loss enhancement (ERLE) than the FG filter, i.e., the BG filter error is smaller than the FG filter error by more than -10logα dB.
  2. Pj(e(b)) < β Pj(y). In this scenario, the degree of send-in signal cancellation by the BG filter is larger than -10log β dB.
  3. Pj(y) < Pj(x), with hangover time T for the condition Pj(y) > Pj(x) to freeze coefficients transfer in double-talk.
The double-talk (DT) detection and NLP logic operation also relies on power measurements. Initially, NLP logic will be more aggressive until a certain level of convergence has been achieved. NLP logic would not be invoked when the DT logic has detected double-talk.

As we can see from the above explanation, a line echo canceller is a very sensitive algorithm to signal power. DC offset can affect the voice signal power measurement and cause the model to determine erroneous filter coefficients transfer, double-talk detection and NLP engagement, ultimately degrading the echo canceller's performance. Therefore, DC offset must be removed in a VoIP system.



Page 2: DC Removal  

Page 1 | 2

Related Links:
  • Intro to VoIP quality measurements
  • Error-Resilient Coding, Part 1: Waveform and CELP Speech Codecs
  • Error-Resilient Coding, Part 3: FEC techniques for speech and other coding techniques
  • Error-Resilient Coding, Part 2: Lapped transform codecs






  • Texas Instruments
    Related Content

    COURSE
    1. Hands-on Training with the New TMS320VC5505 eZdsp USB Stick Development Tool

    COURSE
    2. Low power and high precision with new TMS320C674x DSPs

    WEBINAR
    3. Achieve greater productivity and ease of use with Targeted Design Platforms enabled by Virtex-6 and Spartan-6 FPGAs

    WEBINAR
    4. Understanding and Applying Digital Potentiometers

     


     Featured Jobs
    Ascension Health seeking Solutions Development Analyst in St. Louis, MO

    National Semiconductor seeking Principal IC Design Engineer in Santa Clara, CA

    Taylor Guitars seeking Sr. Web Designer in El Cajon, CA

    Covidien seeking Hardware Manager in Boulder, CO

    Sierra Nevada seeking Software Engineer in Hagerstown, MD

    More jobs on EETimesCareers
     Sponsor
     CAREER CENTER
    Ready to take that job and shove it?
    SEARCH JOBS:

     SPONSOR

     RECENT JOB POSTINGS
    For more great jobs, career related news, features and services, please visit EETimes' Career Center.